Keysight and Intel Foundry Join Forces to Advance EMIB-T Chiplet Design for AI and Data Centre Innovation

SINGAPORE, May 5, 2025 – Keysight Technologies and Intel Foundry have announced a strategic collaboration to drive innovation in high-performance packaging for next-generation AI and data centre applications. At the heart of this partnership is support for Intel’s cutting-edge EMIB-T (Embedded Multi-die Interconnect Bridge-T) silicon bridge technology—an enabler for advanced multi-chiplet integration at scale.

As data-intensive workloads in AI and hyperscale data centres continue to grow, the ability to ensure seamless, high-speed communication between chiplets and 3D integrated circuits (3DICs) is becoming increasingly crucial. The solution? Smarter packaging, underpinned by emerging open standards such as Universal Chiplet Interconnect Express (UCIe ) 2.0 and the Open Compute Project’s Bunch of Wires (BoW).

These next-gen interconnect protocols define how chiplets communicate within complex 2.5D/3D and organic package designs, allowing consistent integration across platforms while ensuring speed, efficiency, and scalability. Keysight and Intel Foundry are building on these standards to accelerate innovation while reducing development costs and time to market.

“Collaborating with Keysight on EMIB-T technology marks a pivotal moment for Intel Foundry,” said Suk Lee, Vice President and General Manager of Intel Foundry’s Ecosystem Technology Office. “By embracing UCIe 2.0 and similar standards, we’re delivering greater design flexibility to address the performance demands of tomorrow’s AI and data centre workloads.”

At the core of Keysight’s contribution is its EDA (Electronic Design Automation) software portfolio—most notably, the Chiplet PHY Designer, a purpose-built tool for high-speed digital chiplet design. The solution now offers advanced simulation capabilities for UCIe 2.0 and has been expanded to include support for the BoW standard. This empowers chiplet engineers to validate designs at the pre-silicon stage, reducing costly late-stage iterations and speeding up the path to production.

“Our Chiplet PHY Designer continues to reshape pre-silicon validation,” said Niels Faché, Vice President and General Manager of Keysight’s Design Engineering Software unit. “By staying ahead of evolving chiplet standards and now supporting Intel Foundry’s EMIB-T technology, we’re helping engineers innovate faster and more confidently.”

The collaboration underscores both companies’ commitment to building a robust, standards-driven chiplet ecosystem—one designed to meet the power, speed, and scalability demands of the AI era.

With this partnership, Intel Foundry and Keysight EDA are paving the way for a new era in chiplet design and packaging—one that promises to reshape how the semiconductor industry approaches innovation at the intersection of performance and efficiency.